In the semiconductor industry, people are interested in reverse engineering (RE) for two reasons revealing the technical information from the chips inside for benchmarking studies of the products or patent-related business. Typical RE comprises product teardowns, system-level analysis, process analysis, circuit extraction.
Outermost Technology has extensive, and intensive RE experiences down to the most advanced analysis methodology like SCM/SSRM/C-AFM, APT, and Cs-corrected TEM with 4 EELS monitor guns. Outermost Technology can provide the sample analysis reports for the top-tier company’s SoC products manufactured by the top-tier foundry.
| Reverse Engineering from System to Silicon | |
|---|---|
| Package Analysis | Bump pitch/pad, metal layer/via, substrate information, pin connection configurations, pin mapping, polyimide, UBM size, and more |
| Functional Block Analysis | Block identification, IO pads, memory block/size, memory type, material identification, technology node, and more |
| Die Structure Analysis | Feature size, metal layer, area, process, design type, pad number, and more |
| Advanced Technologies | Ultra-high resolution TEM/EDS/EELS, SCM (dopant type), SSRM (doping profile), and more |
| Circuit Extraction | Device architecture overview, signal integrity, check specific circuit, and locate the component, and more |
| Stacked Die, Package Analysis | Technology Node, TSV (Through Silicon Via) & Solder Bumper | Pad Measurement | Pin Mapping |
| Block Identification | 5 IO Pad Identified from the Active Layer | Memory Block/Size | Memory Structure |
| SRAM Cell Analysis | Device Internal Structure | Device Dimensions | Measure UBM and Polyimide |
| TEM/EELS | SCM for Dopant Type | SSRM for Dopant Profile |
| Layer by Layer Image & Annotation | Signal Integrity | Circuit Identification | Components Location |
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